Last updated May 4, 2020

Introduction to RTL Design Using Verilog HDL

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Introduction to RTL Design Using Verilog HDL


In this course the user will be initiated to the following:

1.Introduction to digital design using HDLs

2.Definitions and commonly used terminologies

3.Overview of frequently used Verilog constructs

4.Hardware inference of Verilog code

5.General coding guidelines for Verilog

6.Modeling FSMs and memories in Verilog

7.Deliverables of an RTL design engineer

8.New constructs introduced in the Verilog 2001 standard


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